Designers of MOS integrated circuits are turning increasingly toward active devices having channel lengths that are a small fraction of 1 .mu.m. However, these efforts to miniaturize are complicated by the emergence of undesirable, short-channel effects. One method for avoiding at least some of these effects is to fabricate devices having ultrashallow source and drain junctions; i.e., junctions that are made as shallow as possible without unacceptably increasing the sheet resistances of the corresponding doped silicon regions. It has proven relatively simple to form n.sup.+ -p junctions (i.e., junctions between n.sup.+ source or drain regions and a p-type substrate portion) that are ultrashallow, because suitable n-type dopants are available. For example, arsenic can be implanted without undesirable channeling effects, and it has a high solid solubility in silicon.
However, most of the available p-type dopants do not have sufficient solid solubility in silicon for making p.sup.+ -n junctions. Boron is generally the only practical choice for this purpose. However, it is difficult to make shallow junctions by ion implantation of boron, because exhibits channeling behavior.
Extremely shallow, boron-doped p.sup.+ -n junctions (hereinafter referred to as "boron junctions") have, in fact, been made by low energy ion implantation followed by rapid thermal annealing (RTA). However, the resulting junctions exhibited relatively high sheet resistance, and the control of the junction depth was complicated by channeling effects (during implantation) and transient diffusion (during annealing).
Some practitioners have sought to overcome the deficiencies of this approach by using a boron-doped, deposited layer as a diffusion source. In one such approach, a layer of silicon-germanium (SiGe) alloy is deposited by rapid thermal chemical vapor deposition (RTCVD) on a silicon substrate. Boron is implanted into the SiGe layer. The desired junctions are then formed by rapid thermal annealing. This approach is described, for example, in D. T. Grider et al., "Ultra-Shallow Junction Formation by Diffusion from Polycrystalline Si.sub.x Ge.sub.1-x Alloys, " 1991 Electron. Mater. Conf., Boulder, Colo. Because the diffusion source is created in two separate steps, this approach adds an extra step to the manufacturing process. However, it is generally preferable to avoid adding extra process steps, in order to minimize manufacturing costs.
A boron-doped, SiGe layer formed without ion implantation is described in M. Sanganeria et al., "Rapid Thermal Chemical Vapor Deposition of in-situ Boron Doped Polycrystalline Si.sub.x Ge.sub.1-x, " J. Electron. Mater.21 (1992) 61-64. In the process described there, boron is incorporated during layer deposition by reacting a flow of diborane (B.sub.2 H.sub.6) in the RTCVD chamber. The resulting layer comprises boron-doped Si.sub.0.7 Ge.sub.0.3. In at least some fabrication sequences, it will be desirable to remove the diffusion source after the source and drain junctions have been formed. This is conveniently done by etching with a solvent that dissolves the material of the diffusion source more rapidly than the underlying silicon. This selectivity relaxes constraints on the etching time, and therefore tends to increase process yield. However, at least some of the commonly used enchants exhibit relatively low selectivity for Si.sub.0.7 Ge.sub.0.3 over pure silicon.